HAL NOR Types migration

This section provides information about the HAL NOR types migration.

Note

Most of APIs are split according to the command set of the device.

See Typical HAL NOR use cases for migration.

HAL NOR callback ID type definition

HAL1

HAL2 

typedef enum
{
  HAL_NOR_MSP_INIT_CB_ID,
  HAL_NOR_MSP_DEINIT_CB_ID,
} HAL_NOR_CallbackIDTypeDef;

Removed: No more MSP, they are replaced by a user sequence.

Related concept: Remove MspInit and MspDeInit callbacks

HAL NOR state type definition

HAL1

HAL2 

typedef enum
{
  HAL_NOR_STATE_RESET,
  HAL_NOR_STATE_READY,

  HAL_NOR_STATE_BUSY,



  HAL_NOR_STATE_ERROR,

  HAL_NOR_STATE_PROTECTED,
  /* ------------ */
  /* ------------ */
  /* ------------ */
  /* ------------ */
  /* ------------ */
} HAL_NOR_StateTypeDef;

typedef enum
{
  HAL_NOR_STATE_RESET,
  HAL_NOR_STATE_IDLE,

  HAL_NOR_STATE_PROGRAM_ACTIVE,
  HAL_NOR_STATE_ERASE_ACTIVE,
  HAL_NOR_STATE_READ_ACTIVE,

  HAL_NOR_STATE_FAULT,

  /* ------------ */
  HAL_NOR_STATE_INIT,
  HAL_NOR_STATE_CONFIGURED,
  HAL_NOR_STATE_MEMORY_CONFIGURED,
  HAL_NOR_STATE_PROGRAM_SUSPENDED,
  HAL_NOR_STATE_ERASE_SUSPENDED,
} hal_nor_state_t;

Note

  • HAL_NOR_STATE_BUSY is split to :

    • HAL_NOR_STATE_PROGRAM_ACTIVE for program API.

    • HAL_NOR_STATE_ERASE_ACTIVE for Erase API.

    • HAL_NOR_STATE_READ_ACTIVE for Read API.

  • HAL_NOR_STATE_ERROR is replaced with HAL_NOR_STATE_FAULT.

  • HAL_NOR_STATE_PROTECTED is removed, no more state to reflect the NOR write protection instead use the function HAL_NOR_IsEnabledWriteProtection to know if the NOR is write protected.

  • HAL_NOR_STATE_READY is replaced with HAL_NOR_STATE_IDLE.

Related concept: Revised and optimized HAL state machine

HAL NOR flash operation status codes type definition

HAL1

HAL2 

typedef enum
{
  HAL_NOR_STATUS_SUCCESS,
  HAL_NOR_STATUS_ONGOING,
  HAL_NOR_STATUS_ERROR,
  HAL_NOR_STATUS_TIMEOUT
} HAL_NOR_StatusTypeDef;

 typedef enum
{
  HAL_NOR_DEVICE_STATE_SUCCESS,
  HAL_NOR_DEVICE_STATE_ONGOING,
  HAL_NOR_DEVICE_STATE_ERROR
  /* -------------------- */
} hal_nor_device_status_t;

Parameter

HAL1

HAL2

HAL_NOR_STATUS_TIMEOUT

Memory Timeout status

Removed: Timeout status is removed as NOR memory itself does not signal a timeout,

timeout are now managed in the process APIs by returning HAL_TIMEOUT,

when the on-going status exceeds a predefined duration.

HAL NOR common flash interface type definition

HAL1

HAL2

Defines the information stored in the memory’s Common flash interface

which contains a description of various electrical and timing parameters,

density information and functions supported by the memory.

Defines the information stored in the memory’s Common flash interface

which contains a description of all parameters listed in the structure. 

typedef struct
{
  uint16_t CFI_1;
  uint16_t CFI_2;
  uint16_t CFI_3;
  uint16_t CFI_4;
} NOR_CFITypeDef;

typedef struct
{
  uint32_t device_supply_min_mvolt;
  uint32_t device_supply_max_mvolt;
  uint32_t erase_program_supply_min_mvolt;
  uint32_t erase_program_supply_max_mvolt;
  uint32_t word_program_timeout_usec;
  uint32_t buffer_program_timeout_usec;
  uint32_t block_erase_timeout_msec;
  uint32_t full_erase_timeout_msec;
  uint32_t max_word_program_timeout_usec;
  uint32_t max_buffer_program_timeout_usec;
  uint32_t max_block_erase_timeout_msec;
  uint32_t max_full_erase_timeout_msec;
  uint32_t device_size_byte;
  uint32_t max_buffer_byte;
  uint16_t primary_command_set;
  uint16_t extended_primary_table_address;
  uint16_t alternate_command_set;
  uint16_t extended_secondary_table_address;
  uint16_t device_interface_code;
  uint8_t  query_unique_ascii[3];
  uint8_t  erase_block_region_nb;
} hal_nor_cfi_device_info_t;

Note

HAL1 provides basic info about the memory’s flash interface like key electrical, timing, and size details, while HAL2 includes a full detailed set of all parameters for that interface.

HAL NOR handle type definition

HAL1

HAL2 

NOR_HandleTypeDef

hal_nor_handle_t

Related concept: Renaming of the handle structure

FMC NORSRAM timing type definition

HAL1

HAL2 

typedef struct
{
  uint32_t AddressSetupTime;
  uint32_t AddressHoldTime;
  uint32_t DataSetupTime;
  uint32_t DataHoldTime;







  uint32_t CLKDivision;
  uint32_t DataLatency;





  uint32_t BusTurnAroundDuration;
  uint32_t AccessMode;

} FMC_NORSRAM_TimingTypeDef;

typedef struct
{
  uint32_t addr_setup_nsec;
  uint32_t addr_hold_nsec;
  uint32_t data_setup_nsec;
  uint32_t data_hold_nsec;
} hal_nor_timings_t;

typedef struct
{
  hal_nor_sync_wait_signal_state_t wait_signal_state;
  hal_nor_wait_timing_config_t wait_timing_config;
  hal_nor_continuous_clock_t continuous_clock;
  uint32_t clk_period_nsec;
  uint32_t data_latency_nsec;
} hal_nor_sync_protocol_config_t;

typedef struct
{
  hal_nor_timings_t async_access_timings;
  uint32_t bus_turnaround_nsec;
  hal_nor_access_mode_t write_access_mode;
  hal_nor_access_mode_t read_access_mode;
} hal_nor_wr_async_timings_t;

Note

The timing configuration is organized based on the configuration type:

  • Asynchronous read and asynchronous write with identical timing for both operations.

  • Asynchronous read and asynchronous write with distinct timing for each operation.

  • Synchronous read and asynchronous write.

Related concept: Renaming of the handle structure

HAL NOR ID type definition

HAL1

HAL2 

typedef struct
{
  uint16_t Manufacturer_Code;
  uint16_t Device_Code1;
  uint16_t Device_Code2;
  uint16_t Device_Code3;
} NOR_IDTypeDef;

typedef struct
{
  uint16_t device_manufacturer_code;
  uint16_t device_code;
} hal_nor_cfi_0001_device_id_t, hal_nor_cfi_0003_device_id_t;
typedef struct
{
  uint16_t device_manufacturer_code;
  uint16_t device_code_1;
  uint16_t device_code_2;
  uint16_t device_code_3;
  uint16_t indicator_bits;
} hal_nor_cfi_0002_device_id_t;

Note

The ID structure definition has been separated based on the command set and device standard. This is aligned with CFI standard.

Related concept: Other HAL NOR changes

HAL NOR callback type definition

HAL1

HAL2 

pNOR_CallbackTypeDef

Removed: No more Callback in HAL2

FMC NORSRAM initialization type definition

HAL1

HAL2 

typedef struct
{
  uint32_t NSBank;
  uint32_t DataAddressMux;
  uint32_t MemoryType;
  uint32_t MemoryDataWidth;
  uint32_t BurstAccessMode;
  uint32_t WaitSignalPolarity;
  uint32_t WaitSignalActive;
  uint32_t WriteOperation;
  uint32_t WaitSignal;
  uint32_t ExtendedMode;
  uint32_t AsynchronousWait;
  uint32_t WriteBurst;
  uint32_t ContinuousClock;
  uint32_t WriteFifo;
  uint32_t PageSize;
  uint32_t NBLSetupTime;
  FunctionalState MaxChipSelectPulse;
  uint32_t MaxChipSelectPulseTime;
} FMC_NORSRAM_InitTypeDef;

FMC configurations (common) 

typedef struct
{
  hal_nor_write_fifo_state_t               write_fifo;
  hal_nor_wait_signal_polarity_t wait_signal_polarity;
} hal_nor_config_t;

Memory configurations: Asynchronous read and asynchronous write 

typedef struct
{
  hal_nor_memory_config_t memory; // See ⤵
  hal_nor_rd_wr_async_timings_t timings; // See ⤵
} hal_nor_rd_wr_async_memory_config_t;

typedef struct
{
  hal_nor_mux_data_addr_state_t byte_lane_setup_cycle;
} hal_nor_memory_config_t;

typedef struct
{
  hal_nor_async_wait_signal_state_t async_wait;
  hal_nor_timings_t access_timings;
  uint32_t bus_turnaround_nsec;
} hal_nor_rd_wr_async_timings_t;

Memory configurations: Synchronous read and asynchronous write 

typedef struct
{
  hal_nor_memory_config_t memory; // See ⤵
  hal_nor_sync_async_timings_t timings; // See ⤵
} hal_nor_rd_sync_wr_async_memory_config_t;

typedef struct
{
  hal_nor_mux_data_addr_state_t byte_lane_setup_cycle;
} hal_nor_memory_config_t;

typedef struct
{
  hal_nor_sync_protocol_config_t sync_protocol; // See ⤵
  hal_nor_async_wait_signal_state_t async_wait;
  hal_nor_timings_t async_access_timings;
  uint32_t bus_turnaround_nsec;
} hal_nor_sync_async_timings_t;

typedef struct
{
  hal_nor_sync_wait_signal_state_t wait_signal_state;
  hal_nor_wait_timing_config_t wait_timing_config;
  hal_nor_continuous_clock_t continuous_clock;
  uint32_t clk_period_nsec;
  uint32_t data_latency_nsec;
} hal_nor_sync_protocol_config_t;

Related use case: HAL FMC NOR initialization and configuration functions migration.

Related concept: Removal and conversion of init structure to configuration structure.

FMC data address bus multiplexing

HAL1

HAL2 



#define FMC_DATA_ADDRESS_MUX_DISABLE
#define FMC_DATA_ADDRESS_MUX_ENABLE

typedef enum
{
  HAL_NOR_MUX_DATA_ADDR_DISABLE,
  HAL_NOR_MUX_DATA_ADDR_ENABLE
} hal_nor_mux_data_addr_state_t;

FMC write FIFO

HAL1

HAL2 



#define FMC_WRITE_FIFO_DISABLE
#define FMC_WRITE_FIFO_ENABLE

typedef enum
{
  HAL_NOR_WRITE_FIFO_DISABLE,
  HAL_NOR_WRITE_FIFO_ENABLE
} hal_nor_write_fifo_state_t;

FMC access mode

HAL1

HAL2 



#define FMC_ACCESS_MODE_A
#define FMC_ACCESS_MODE_B
#define FMC_ACCESS_MODE_C
#define FMC_ACCESS_MODE_D

typedef enum
{
  /* A mode for SRAM */
  HAL_NOR_ACCESS_MODE_B,
  HAL_NOR_ACCESS_MODE_C
  /* D mode for SRAM */
} hal_nor_access_mode_t;